A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC.
Siddharth DevarajanLarry SingerDan KellySteven DeckerAbhishek KamathPaul WilkinsPublished in: ISSCC (2009)
Keyphrases
- power consumption
- power supply
- hd video
- signal to noise ratio
- analog to digital converter
- low power
- high definition
- single chip
- noise reduction
- database
- video transmission
- low cost
- real time
- vlsi circuits
- pipeline architecture
- neural network
- ofdm system
- cmos image sensor
- bit error rate
- video quality
- delay insensitive
- pac man
- wide dynamic range
- high speed