High-speed J-delayed & K-dimensional LFSR architecture in VLSI.

Chan-Bok Jeong Young-Ha Lee Hyeon-Deok Bae

Published in: MWSCAS (2013)

Keyphrases

high speed
shift register
real time
low power
vlsi architecture
management system
processor array
vlsi implementation
architectural design
data flow
frame rate
image processing
computer vision
learning algorithm
databases
mobile robot
website
e learning
search engine
genetic algorithm
data sets
database