Parallel Graph-Based Stateless Model Checking.
Magnus LångKonstantinos SagonasPublished in: ATVA (2020)
Keyphrases
- model checking
- temporal logic
- automated verification
- model checker
- partial order reduction
- formal verification
- finite state
- formal specification
- verification method
- symbolic model checking
- temporal properties
- finite state machines
- reachability analysis
- epistemic logic
- asynchronous circuits
- linear temporal logic
- process algebra
- computation tree logic
- formal methods
- bounded model checking
- transition systems
- timed automata
- pspace complete
- concurrent systems
- reactive systems
- belief revision
- modal logic
- np complete