Formal Modelling and Verification of IEC61499 Function Blocks with Abstract State Machines and SMV - Execution Semantics.
Sandeep PatilVictor DubininValeriy VyatkinPublished in: SETTA (2015)
Keyphrases
- model checking
- formal methods
- formal verification
- control system
- formal specification
- model theoretic
- machine processable
- control flow
- sound and complete axiomatization
- epistemic logic
- temporal logic
- active rules
- symbolic model checking
- specification languages
- formal analysis
- data flow
- formal language
- conceptual model
- fractal image coding
- semantic information
- logic programming