Low power clock gates optimization for clock tree distribution.

Siong Kiong Teng Norhayati Soin

Published in: ISQED (2010)

Keyphrases

low power
power consumption
high speed
logic circuits
single chip
low cost
power reduction
vlsi circuits
high power
power dissipation
power saving
digital signal processing
vlsi architecture
wireless transmission
low power consumption
general purpose
real time
image sensor
computer simulation
delay insensitive