A 0.47-1.6 mW 5-bit 0.5-1 GS/s Time-Interleaved SAR ADC for Low-Power UWB Radios.
Pieter HarpeBen BuszeKathleen PhilipsHarmke de GrootPublished in: IEEE J. Solid State Circuits (2012)
Keyphrases
- low power
- power consumption
- analog to digital converter
- mixed signal
- single chip
- image sensor
- high speed
- high power
- wireless transmission
- low cost
- vlsi circuits
- low power consumption
- communication systems
- power reduction
- vlsi architecture
- logic circuits
- cmos technology
- gate array
- power dissipation
- digital signal processing
- delay insensitive
- signal processor
- nm technology