In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL.
Marius MeyerTobias KenterChristian PlesslPublished in: J. Parallel Distributed Comput. (2022)
Keyphrases
- field programmable gate array
- benchmark suite
- parallel computing
- high performance computing
- hardware implementation
- embedded systems
- massively parallel
- computer architecture
- fpga implementation
- hardware architecture
- programmable logic
- image processing algorithms
- computing systems
- pipelined architecture
- hardware design
- fpga device
- software implementation
- hardware software
- depth information
- parallel programming
- shared memory
- depth map
- graphics processing units
- multi core processors
- transactional memory
- parallel architectures
- scientific computing
- fpga technology
- processing units
- general purpose
- image processing
- parallel machines
- fault tolerance
- message passing interface
- reconfigurable hardware
- parallel algorithm
- software systems
- xilinx virtex
- hardware description language
- cloud computing
- data management