Login / Signup
A low-power 4-b 2.5 Gsample/s pipelined flash analog-to-digital converter using differential comparator and DCVSPG encoder.
Shailesh Radhakrishnan
Mingzhen Wang
Chien-In Henry Chen
Published in:
ISCAS (6) (2005)
Keyphrases
</>
low power
analog to digital converter
mixed signal
power reduction
power consumption
low cost
high speed
image sensor
single chip
rate distortion
digital signal processing
bit rate
low complexity
data flow
multi channel
low power consumption
power dissipation
cmos technology
motion estimation
real time
image sequences