Design of high-performance low-power full adder.

Nehru Kandasamy A. Shanmugam

Published in: Int. J. Comput. Appl. Technol. (2014)

Keyphrases

low power
low power consumption
logic circuits
power dissipation
power consumption
single chip
high speed
low cost
vlsi architecture
signal processor
cmos technology
gate array
digital signal processing
mixed signal
high power
vlsi circuits
ultra low power
real time
power reduction
design process