g-BERT: Enabling Green BERT Deployment on FPGA via Hardware-Aware Hybrid Pruning.
Yueyin BaiHao ZhouRuiqi ChenKuangjie ZouJialin CaoHaoyang ZhangJianli ChenJun YuKun WangPublished in: ICC (2023)
Keyphrases
- field programmable gate array
- hardware implementation
- hardware architecture
- low cost
- parallel hardware
- hardware design
- real time
- software implementation
- dedicated hardware
- single chip
- fpga hardware
- embedded systems
- programmable logic
- fpga implementation
- hardware and software
- search space
- reconfigurable hardware
- digital signal processing
- hardware description language
- real time image processing
- fpga technology
- fpga device
- hardware architectures
- signal processing
- high end
- parallel architecture
- high speed
- massively parallel
- image processing algorithms
- computing systems
- general purpose
- personal computer
- verilog hdl
- xilinx virtex
- pruning algorithm
- processing capabilities
- parallel computing
- efficient implementation
- image processing