A hierarchy multiple-voltage design technique for low-power performance-manageable bio-chips.
Yu-Shin WangChing-Hwa ChengPublished in: ICCE-TW (2016)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low cost
- logic circuits
- vlsi architecture
- low power consumption
- cmos technology
- power reduction
- design process
- mixed signal
- digital signal processing
- vlsi implementation
- gate array
- image processing
- message passing
- computer systems
- wireless transmission
- energy dissipation
- nm technology