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A practical CAD technique for reducing power/ground noise in DSM circuits.
Arindam Mukherjee
Krishna Reddy Dusety
Rajsaktish Sankaranarayan
Published in:
ACM Great Lakes Symposium on VLSI (2003)
Keyphrases
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power reduction
power consumption
random noise
real world
computer aided design
noise level
object oriented
noise reduction
power saving
power dissipation
noise model
computer aided
design process
data sets
additive noise
signal to noise ratio
noisy environments
high speed
cmos technology
image analysis
databases