Deflection routing for multi-level FPGA overlay NoCs.
Kumar H. B. ChethanShubham AgarwalNachiket KaprePublished in: FPT (2016)
Keyphrases
- routing problem
- field programmable gate array
- network topology
- hardware implementation
- routing algorithm
- high speed
- hardware design
- routing protocol
- overlay network
- single chip
- signal processing
- low cost
- real time image processing
- ad hoc networks
- inter domain
- shortest path
- dedicated hardware
- hardware architectures
- parallel hardware
- data sets
- multicast routing
- mobile ad hoc networks
- fpga hardware
- traffic engineering
- network layer
- hardware architecture
- network topologies
- multi layer
- neural network