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Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA.
Jun Yeon Won
Sun Il Kwon
Hyun Suk Yoon
Guen Bae Ko
Jeong-Whan Son
Jae Sung Lee
Published in:
IEEE Trans. Biomed. Circuits Syst. (2016)
Keyphrases
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single phase
data conversion
analog to digital converter
high speed
data acquisition
real time
low cost
signal processing
fpga hardware