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Fully integrated CMOS phase-locked loop with 30 MHz to 2 GHz locking range and 35 ps jitter.

Chao XuWinslow SargeantKenneth R. LakerJan Van der Spiegel
Published in: ICECS (2001)
Keyphrases
  • fully integrated
  • high speed
  • phase locked loop
  • low power
  • power consumption
  • cmos technology
  • high frequency
  • information systems
  • concurrency control
  • database systems
  • wavelet transform
  • data warehouse
  • multipath