Fully depleted CMOS/SOI device design guidelines for low power applications.
Srinivasa R. BannaPhilip C. H. ChanMansun ChanSamuel K. H. FungPing K. KoPublished in: ISLPED (1997)
Keyphrases
- low power
- design guidelines
- silicon on insulator
- cmos technology
- ultra low power
- power consumption
- high speed
- low cost
- single chip
- educational games
- user interface
- design issues
- vlsi circuits
- low power consumption
- design process
- interface design
- low voltage
- design principles
- digital signal processing
- user groups
- logic circuits
- image sensor
- mixed signal
- cmos image sensor
- information sources
- power management
- real time
- visual analytics
- power reduction
- metal oxide semiconductor
- human computer interaction
- delay insensitive
- nm technology
- embedded systems