A novel latch design technique for high speed GaAs circuits.

Saeid Nooshabadi Juan A. Montiel-Nelson Kamran Eshraghian

Published in: ICECS (1999)

Keyphrases

high speed
low power
logic circuits
case study
design process
design principles
real time
power consumption
circuit design
power dissipation
high level synthesis
delay insensitive
electronic circuits
high speed networks
analog circuits
user interface
artificial intelligence