A Flexible Design Flow for a Low Power RFID Tag.
José Carlos S. PalmaCésar A. M. MarconFabiano HesselEduardo A. BezerraGuilherme RohdeLuciano AzevedoCarlos Eduardo ReifCarolina MetzlerPublished in: VLSI-SoC (2007)
Keyphrases
- low power
- low power consumption
- low cost
- power consumption
- single chip
- logic circuits
- high speed
- rfid tags
- vlsi architecture
- gate array
- real time
- power dissipation
- design process
- cmos technology
- digital signal processing
- application specific
- mixed signal
- ultra low power
- high power
- circuit design
- wireless transmission
- nm technology