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A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip.

Dhruva GhaiSaraju P. MohantyElias Kougianos
Published in: ACM Great Lakes Symposium on VLSI (2008)
Keyphrases
  • low voltage
  • high speed
  • design considerations
  • power line
  • low power
  • cmos technology
  • power consumption
  • real time
  • hardware and software
  • power management
  • data streams
  • low cost
  • random access memory