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Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency.

Paulo C. SantosMarco A. Z. AlvesMatthias DienerLuigi CarroPhilippe O. A. Navaux
Published in: PDP (2016)
Keyphrases
  • access latency
  • prefetching
  • memory requirements
  • main memory
  • memory access
  • data structure
  • computer systems
  • cache hit ratio
  • query processing
  • multi dimensional
  • random access