FPGA realization of a novel frontend signal processor for pager decoders.
Ching-Chih KuoChi-Yuan PengPublished in: IEEE Trans. Consumer Electron. (2002)
Keyphrases
- signal processor
- low power
- single chip
- power reduction
- signal processing
- power consumption
- low cost
- high speed
- hardware implementation
- back end
- real time
- power saving
- hardware and software
- field programmable gate array
- real time image processing
- verilog hdl
- power dissipation
- hardware architecture
- hardware design
- frequency domain
- image quality
- image processing