Low noise low power two-stage modulator with injection locked LO divider in 65nm CMOS.
Wufeng WangPeichen JiangTingting MoJianjun ZhouPublished in: ASICON (2011)
Keyphrases
- low power
- cmos technology
- power consumption
- high speed
- low cost
- low power consumption
- nm technology
- single chip
- wireless transmission
- image sensor
- vlsi circuits
- energy dissipation
- high power
- mixed signal
- power reduction
- power dissipation
- low voltage
- delay insensitive
- vlsi architecture
- wide dynamic range
- logic circuits
- power management
- noise shaping
- signal to noise ratio
- power saving
- focal plane
- digital signal processing
- hardware and software
- gate array
- ultra low power