Fault modeling and testing of retention flip-flops in low power designs.
Bing-Chuan BaiAugusli KifliChien-Mo James LiKun-Cheng WuPublished in: ASP-DAC (2009)
Keyphrases
- low power
- flip flops
- power dissipation
- power consumption
- high speed
- low cost
- cmos technology
- nm technology
- vlsi circuits
- vlsi architecture
- logic circuits
- wireless transmission
- high power
- single chip
- digital signal processing
- low power consumption
- signal processor
- gate array
- mixed signal
- multiple input
- delay insensitive
- hidden markov models