A variation tolerant architecture for ultra low power multi-processor cluster.

Daniele Bortolotti Davide Rossi Andrea Bartolini Luca Benini

Published in: PATMOS (2013)

Keyphrases

multi processor
program execution
single processor
shared memory
multi core processors
distributed memory
network on chip
ultra low power
software architecture
real time
general purpose
programming language
orders of magnitude
power consumption
low power
parallel machines