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Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA.
Zdenek Pohl
Milan Tichý
Jiri Kadlec
Published in:
EURASIP J. Adv. Signal Process. (2008)
Keyphrases
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least squares
parameter estimation
high speed
robust estimation
real time
hardware implementation
hardware design
database
databases
dedicated hardware