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A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates.
Layong Luo
Gaogang Xie
Yingke Xie
Laurent Mathy
Kavé Salamatian
Published in:
IEEE/ACM Trans. Netw. (2014)
Keyphrases
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hardware architecture
high speed
hardware implementation
hardware architectures
field programmable gate array
low power
associative memory
content addressable memory
real time
shortest path
road network
xilinx virtex