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High-PSRR, Low-Voltage CMOS Current Mode Reference Circuit Using Self-Regulator with Adaptive Biasing Technique.
Kenya Kondo
Hiroki Tamura
Koichi Tanno
Published in:
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2020)
Keyphrases
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low voltage
cmos technology
design considerations
power line
power management
random access memory
high speed
steady state
low power
closed loop
real time
cost effective
power consumption