Low-power vectorial VLIW architecture for maximum parallelism exploitation of dynamic programming algorithms.
Miguel Tairum CruzPedro TomásNuno RomaPublished in: HPCS (2014)
Keyphrases
- low power
- dynamic programming algorithms
- vlsi architecture
- level parallelism
- low cost
- power consumption
- high speed
- cmos technology
- energy dissipation
- single chip
- mixed signal
- dynamic programming
- nm technology
- vlsi circuits
- logic circuits
- digital signal processing
- real time
- parallel processing
- optimal policy
- signal processor
- gate array
- low power consumption
- markov decision problems
- multi core processors
- power reduction
- data flow
- search space