Particle Rendering Engine in DSP and FPGA.
Pavel ZemcíkAdam HeroutLudek CrhaOtto FucíkPavel TupecPublished in: ECBS (2004)
Keyphrases
- verilog hdl
- digital signal processing
- systolic array
- real time image processing
- signal processing
- digital signal
- high speed
- field programmable gate array
- hardware implementation
- digital signal processor
- digital signal processors
- low power
- data flow
- low cost
- image processing
- embedded systems
- evolution process
- pattern recognition
- case study
- video processing
- parallel architecture
- fpga implementation
- low power consumption
- general purpose