An FPGA implementation of a Restricted Boltzmann Machine classifier using stochastic bit streams.
Bingzhe LiM. Hassan NajafiDavid J. LiljaPublished in: ASAP (2015)
Keyphrases
- fpga implementation
- bitstream
- restricted boltzmann machine
- deep learning
- hardware implementation
- coding scheme
- bit rate
- block coding
- learning algorithm
- compressed bit stream
- training data
- field programmable gate array
- feature selection
- training set
- support vector
- probabilistic graphical models
- feature space
- conditional random fields
- text classification
- wavelet coefficients
- artificial neural networks
- image processing algorithms
- pairwise
- pattern recognition
- multiscale