A High-Performance Parallel Hardware Architecture of SHA-256 Hash in ASIC.
Ruizhen WuXiaoyong ZhangMingming WangLin WangPublished in: ICACT (2020)
Keyphrases
- hardware architecture
- processing elements
- hash functions
- hardware implementation
- distributed memory
- distributed memory machines
- pc cluster
- hardware architectures
- field programmable gate array
- associative memory
- shared memory
- parallel computing
- parallel computers
- graphics processing units
- image processing algorithms
- parallel architecture
- parallel processing
- general purpose
- image processing
- computer architecture
- real time
- parallel implementation
- high dimensional
- computer vision