Customizable FPGA-based Accelerator for Binarized Graph Neural Networks.
Ziwei WangZhiqiang QueWayne LukHongxiang FanPublished in: ISCAS (2022)
Keyphrases
- neural network
- graph representation
- artificial neural networks
- directed acyclic graph
- graph theory
- field programmable gate array
- bipartite graph
- random walk
- parallel implementation
- directed graph
- neural network model
- fuzzy systems
- rbf network
- feed forward
- structured data
- pattern recognition
- graph matching
- graph theoretic
- connected components
- weighted graph
- input image
- application specific
- genetic algorithm
- graph based algorithm
- random graphs
- hopfield neural network
- bounding box
- hardware implementation
- graph structure
- neural nets
- multilayer perceptron
- radial basis function
- self organizing maps
- back propagation
- fuzzy logic