Design and Implementation of High Speed, Low Area Multiported Loadless 4T Memory Cell.
Deepa YagainAnkit ParakhAkriti KediaGunjan Kumar GuptaPublished in: ICETET (2011)
Keyphrases
- high speed
- implementation issues
- architectural design
- memory usage
- memory management
- efficient implementation
- real time
- design decisions
- computer aided
- case study
- database
- design process
- parallel distributed
- user interface
- data sets
- detailed design
- analog to digital converter
- computer architecture
- design methodology
- engineering design
- evolutionary algorithm
- neural network