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Accelerating Attention Mechanism on FPGAs based on Efficient Reconfigurable Systolic Array.

Wenhua YeXu ZhouJoey ZhouCen ChenKenli Li
Published in: ACM Trans. Embed. Comput. Syst. (2023)
Keyphrases
  • systolic array
  • reconfigurable architecture
  • attention mechanism
  • data flow
  • low cost
  • field programmable gate array
  • high level
  • object oriented
  • hardware implementation