A new VLSI algorithm and architecture for the hardware implementation of type IV discrete cosine transform using a pseudo-band correlation structure.
Doru-Florin ChiperPublished in: Central Eur. J. Comput. Sci. (2011)
Keyphrases
- hardware implementation
- software implementation
- hardware architecture
- fpga implementation
- signal processing
- pipelined architecture
- pipeline architecture
- parallel architecture
- discrete cosine transform
- image processing algorithms
- neural network
- fpga technology
- hardware design
- general purpose
- efficient implementation
- image compression
- computational complexity
- dedicated hardware
- image binarization
- image processing
- feature selection