A scalable and reconfigurable priority queue architecture for ATM switches.

Yoon-Hwa Choi Pong-Gyou Lee

Published in: Comput. Commun. (2000)

Keyphrases

priority queue
data structure
hardware implementation
systolic array
management system
service times
scalable distributed
network architecture
dynamic reconfiguration
multiprocessor architecture
real time
general purpose
software architecture
reconfigurable architecture
steady state
associative memory