Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology.

Zhengfei Hu Li Zhang Mindi Huang

Published in: J. Circuits Syst. Comput. (2015)

Keyphrases

cmos technology
low power
power consumption
low voltage
spl times
high speed
parallel processing
power dissipation
signal to noise ratio
real time
pattern recognition
digital images
multipath