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Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders.
Huang-Chang Lee
Mao-Ruei Li
Jyun-Kai Hu
Po-Chiao Chou
Yeong-Luh Ueng
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2017)
Keyphrases
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efficient implementation
high rate
decoding algorithm
ldpc codes
low rate
low density parity check
false alarms
active set
efficient processing
hardware implementation
highly parallel
object recognition
false negative
low complexity
channel coding