Automated Mapping of Asynchronous Circuits on FPGA under Timing Constraints.
Gang MaoAlex YakovlevFei XiaShengqi YuRishad A. ShafikPublished in: ISVLSI (2022)
Keyphrases
- asynchronous circuits
- timing constraints
- real time databases
- real time systems
- real time
- delay insensitive
- real time database systems
- execution model
- concurrency control
- active databases
- resource constraints
- high speed
- security requirements
- embedded devices
- model checking
- low cost
- cost model
- information systems
- temporal databases
- fine grained