A Novel Cache Organization for Tiled Chip Multiprocessor.
Xi ZhangDongsheng WangYibo XueHaixia WangJinglei WangPublished in: APPT (2009)
Keyphrases
- multithreading
- memory subsystem
- parallel computing
- highly efficient
- high speed
- low cost
- shared memory multiprocessor
- processor core
- memory access
- level parallelism
- data access
- cache misses
- distributed memory
- physical design
- speculative execution
- multiprocessor systems
- computational power
- knowledge management
- query processing
- highly parallel
- shared memory
- vlsi implementation
- database machines
- single chip
- main memory
- information processing
- memory bandwidth
- scheduling algorithm
- shared memory multiprocessors
- input output
- ibm zenterprise
- analog vlsi
- prefetching
- memory hierarchy
- information systems