Parallel VLSI architecture for MAP turbo decoder.

Rostislav (Reuven) Dobkin Michael Peleg Ran Ginosar

Published in: PIMRC (2002)

Keyphrases

vlsi architecture
low complexity
vlsi implementation
low power
turbo codes
real time
distributed video coding
low density parity check
computational complexity
motion estimation
low cost
power consumption
bit plane
channel coding