A 9-bit body-biased vernier ring time-to-digital converter in 65 nm CMOS technology.
Junjie KongLiter SiekChiang Liang KokPublished in: ISCAS (2015)
Keyphrases
- cmos technology
- mixed signal
- analog to digital converter
- low voltage
- spl times
- low power
- random access memory
- image sensor
- power consumption
- parallel processing
- cmos image sensor
- low cost
- high speed
- high quality
- power dissipation
- flip flops
- data conversion
- silicon on insulator
- image processing algorithms
- digital camera
- neural network
- multi channel
- multimedia
- real time