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Design of a Compact Double-Channel 5-Gb/s/ch Serializer Array for High-Speed Parallel Links.
Chang-Chun Zhang
Long Miao
Kui-ying Yin
Yu-feng Guo
Lei-lei Liu
Published in:
IEICE Trans. Electron. (2014)
Keyphrases
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high speed
design space
data sets
building blocks
computer aided
real time
neural network
social networks
evolutionary algorithm
low cost
software architecture
parallel processing
embedded systems
low power
computer architecture