Sigma-delta based clock recovery using on-chip PLL in FPGA.
Ning GeYuyu LiuHuazhong YangHui WangPublished in: FPT (2006)
Keyphrases
- sigma delta
- high speed
- image sensor
- single chip
- power consumption
- low power
- low power consumption
- high order
- fpga device
- field programmable gate array
- low cost
- programmable logic
- hardware implementation
- clock frequency
- image processing algorithms
- matlab simulink
- power reduction
- signal processing
- real time
- high signal to noise ratio
- reconfigurable hardware
- dynamic range
- frame rate
- efficient implementation
- neural network
- control method
- digital camera
- control system
- pairwise