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An integrated design environment of fault tolerant processors with flexible HW/SW solutions for versatile performance/cost/coverage tradeoffs.
Yi-Ju Ke
Yi-Chieh Ghen
Jng-Jer Huang
Published in:
ITC-Asia (2017)
Keyphrases
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fault tolerant
hw sw
fault tolerance
distributed systems
design methodology
hardware software
case study
embedded systems
image processing
hardware software partitioning
load balancing
design process
software engineering
object oriented
interconnection networks
digital libraries
fault isolation