A novel tunable gain CMOS buffer amplifier for large resistive loads.

Jayachandran Remya P. C. Subramaniam K. J. Dhanaraj

Published in: Integr. (2021)

Keyphrases

high power
power supply
low cost
high speed
low power
load balancing
buffer size
circuit design
analog vlsi
dynamic response
power consumption
high sensitivity
response time
single chip
image quality
image processing
vlsi circuits
buffer overflow