Low power reconfigurable FP-FFT core with an array of folded DA butterflies.
Augusta Beulet PaulSrinivasan RajuRaja JanakiramanPublished in: EURASIP J. Adv. Signal Process. (2014)
Keyphrases
- low power
- low cost
- power consumption
- image sensor
- power reduction
- high speed
- single chip
- digital signal processing
- high power
- vlsi architecture
- wireless transmission
- vlsi circuits
- low power consumption
- systolic array
- digital camera
- hardware and software
- fast fourier transform
- logic circuits
- frequency domain
- floating point
- cmos technology
- real time
- gate array