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An FPGA Implementation for a Flexible-Length-Arithmetic Processor Employing the FDFM Processor Core Approach.
Tatsuya Kawamoto
Xin Zhou
Jacir Luiz Bordim
Yasuaki Ito
Koji Nakano
Published in:
IEICE Trans. Inf. Syst. (2016)
Keyphrases
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processor core
fpga implementation
operating system
hardware implementation
ibm zenterprise
real time
computer systems
response time
computer vision
information systems
image processing
data center
data access
efficient implementation
image processing algorithms
field programmable gate array