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Real-time FPGA architecture of modified Stable Euler-Number algorithm for image binarization.

Naeem AbbasiJacques AthowAishy Amer
Published in: ICIP (2009)
Keyphrases
  • euler number
  • image binarization
  • hardware implementation
  • quadtree
  • document images
  • optical character recognition
  • signal processing
  • vision system
  • efficient implementation
  • data structure
  • multiresolution