Design of flip-flops with clock-gating and pull-up control scheme for power-constrained and speed-insensitive applications.
Liang GengJizhong ShenCongyuan XuPublished in: IET Comput. Digit. Tech. (2016)
Keyphrases
- power dissipation
- control scheme
- power consumption
- controller design
- flip flops
- low power
- power reduction
- dynamic model
- closed loop
- clock gating
- control strategy
- pattern recognition
- robot manipulators
- induction motor
- real time
- control law
- formal specification
- cmos technology
- energy efficiency
- digital signal processing
- embedded systems
- fuzzy sets
- control system